FIG. 1 illustrates a prior art four-quadrant multiplier based on a common-emitter multi-tanh transistor cell. The circuit of FIG. 1 includes a core of four transistors Q1-Q4 having their emitters connected together at a common node N1. A current source IT is connected to N1 to provide a bias current (or “tail current”) for transistors Q1-Q4. The X and Y inputs are applied to a network of input resistors R1-R8 as differential voltages ±VX and ±VY. The collectors of Q1 and Q4 are connected together to provide a first output current IM, and the collectors of Q2 and Q3 are connected together to provide a second output current IP which, in combination with IM, provides a differential output signal IOUT. The scaling of the multiplier is set by the value of IT which determines the transconductance of the entire multiplier. Thus, the bias current may be utilized as a third multiplying input.
The signals at the bases of Q1-Q4 are designated as X+Y, X−Y, Y−X and −X−Y, respectively. The variables X and Y are defined as X=VX/2VT and Y=VY/2VT, where VT is the thermal voltage kT/q. Thus, X and Y are normalized dimensionless variables. The need for the factor 2 in the denominator is apparent from FIG. 1; for example, if +VX is held constant and +VY is increased by some amount, one-half of the increase is applied to the base of Q1.
For a generalized common-emitter multi-tanh transistor cell having N transistors, the collector currents bear the following relationships:
                              I          K                =                                            exp              ⁡                              (                                                      V                    K                                    /                                      V                    T                                                  )                                                                    ∑                                  K                  =                  1                                                  K                  =                  N                                            ⁢                              exp                ⁡                                  (                                                            V                      K                                        /                                          V                      T                                                        )                                                              ⁢                      I            T                                              (                  Eq          .                                          ⁢          1                )            Inserting the base voltages and adding the collector currents with the appropriate phasing as shown in FIG. 1, we have
                              I          OUT                =                                                                                                                        exp                      ⁡                                              (                                                  X                          +                          Y                                                )                                                              +                                          exp                      ⁡                                              (                                                                              -                            X                                                    -                          Y                                                )                                                              -                                                                                                                                          exp                      ⁡                                              (                                                                              -                            X                                                    +                          Y                                                )                                                              -                                          exp                      ⁡                                              (                                                                              -                            X                                                    -                          Y                                                )                                                                                                                                                                                                            exp                      ⁡                                              (                                                  X                          +                          Y                                                )                                                              +                                          exp                      ⁡                                              (                                                                              -                            X                                                    -                          Y                                                )                                                              +                                                                                                                                          exp                      ⁡                                              (                                                                              -                            X                                                    +                          Y                                                )                                                              +                                          exp                      ⁡                                              (                                                                              -                            X                                                    -                          Y                                                )                                                                                                                          ⁢                      I            T                                                        (                      Eq            .                                                  ⁢            2                    )                ⁢                                      Using the truncated expansion exp(u)≈1+u+u2/2 for the exponential functions of the individual transistors it can be shown that the differential output current IOUT may be approximated as follows:
                              I          OUT                ≈                              XY                          1              +                                                (                                                            X                      2                                        +                                          Y                      2                                                        )                                /                2                                              ⁢                      I            T                                              (                  Eq          .                                          ⁢          3                )            The product term (X2+Y2) diminishes when X and Y are relatively small, and thus the equation collapses to IOUT≈XYIT which provides a useful multiplication function at low input signal levels. As the magnitude of the X or Y input increases, however, the product term (X2+Y2) in the denominator of Eq. 3 increases to the point that the approximation breaks down. In a typical implementation, the multiplier of FIG. 1 has an acceptably linear input range of about ±40 mV, beyond which, the behavior starts to enter a limiting domain of operation.